Tensilica has two main product lines of 32-bit processor cores for SOC design: the Diamond Standard processors and the configurable and extensible Xtensa processors.

Tensilica’s Diamond Standard processors are a set of off-the-shelf synthesizable cores that range from area-efficient, low-power controllers to an audio processor, a high-performance DSP, and a video processor that are available directly from Tensilica and through a growing list of ASIC and foundry partners. Additionally, the Diamond Standard 106Micro is available for FPGA designers that use Synplicity's tools. Diamond Standard processors come with a comprehensive software tool set for easy design in.

Tensilica’s Xtensa processors are synthesizable processors that are configurable and extensible. Using Xtensa technology, the system designer molds the processor to fit the application by selecting and configuring predefined elements of the architecture. Additionally, designers can optimize the processor by inventing completely new instructions and hardware execution units that can deliver performance levels orders of magnitude faster than alternative solutions. Once the designer determines the optimal configuration and extensions, the Xtensa Processor Generator automatically generates, in about an hour, a synthesizable hardware description complete with EDA scripts as well as a complete optimized software environment – including operating system support – matching each processor configuration.

Tensilica's Product Line At a Glance

Base Architecture and Cool Technology

In this section, you'll read about the architecture behind all of these products - Tensilica's efficient, low-power Xtensa architecture. You also can read about the complete software tool chain, third party ecosystem, EDA flows, and models available with every Tensilica processor.

Configurable and Extensible to Match Your Application

You can configure Tensilica's Xtensa processors to match your application. And you can take it one step further by extending the processor, using our Verilog-like TIE language, to add custom instructions that can give you orders of magnitude performance increases.