Diamond Standard 232L

Products » Diamond Controllers » 232L for Linux

An Efficient Controller Optimized for Linux

Features

Smallest, lowest-power Linux-ready CPU in its class
Linux-compatible Memory Management Unit
5-stage pipeline
Dhrystone 2.1: 1.38 DMIPS/MHz
32x32 multiplier and 32-bit integer divider
Single cycle 16x16-bit MAC
16-bit DSP instructions
16Kbyte, 4-way set associative instruction and data caches
32-bit input/output GPIO pins for direct communication
Integrated interrupt controller with 22 interrupts at 6 priority levels
Three integrated timers
On-chip debugging hardware
Embedded trace support
Comprehensive software design environment
AHB-lite and AXI bridges

Benefits

Flexible memory architecture adaptable to an extremely wide range of applications
On-chip debug decreases time to market
High arithmetic and DSP performance, eliminating need for separate DSP
Fast and flexible interrupt handling
High performance on general-purpose code
No memory contention between instructions and data
Ready for Linux operating system support
Drop into existing AMBA-based SOCs

NOTE: See Tensilica's open-source Linux website.

Flexible Mid-Range CPU with Linux OS Support

The Diamond Standard 232L is a high-performance, versatile fully synthesizable 32-bit RISC CPU controller core. It is area and power efficient with a local memory architecture that provides outstanding flexibility and performance, with a full-featured Memory Management Unit (MMU) for application processing using operating systems such as Linux. The caches are 16Kbyte instruction and data, 4-way set associative.

The MMU provides instruction and data Translation Lookaside Buffers (TLBs), which manage virtual-to-physical address mapping. In addition to address translation, the MMU provides four different privilege levels (for memory protection), variable page sizes, and multiple access modes. Combining the MMU with a flexible interrupt architecture and high performance, the Diamond 232L can easily meet the needs of a complex system running numerous operations.

Arithmetic and DSP hardware support in the processor reduces the need to include a separate DSP in the system design. Arithmetic support is provided by a built-in 32x32 multiplier and 32-bit integer divider. DSP support in the Diamond 232L consists of a single-cycle 16x16-bit MAC unit adding four dedicated 32-bit registers and a 40-bit accumulator. Additionally, there is support for zero overhead looping, clamps (saturating arithmetic), max/min value, normalize, and sign extend.

Get the 2-page Diamond Standard 232L product brief.

Read EETimes article about debugging a Linux device driver running on a Diamond 232L.

Frequency, Area and Power Specs

	90G		65GP		65LP
	Speed Optimized	Area Optimized	Speed Optimized	Area Optimized	Speed Optimized	Area Optimized
Area (mm²) post-synthesis	0.48	0.40	0.29	0.22	0.25	0.204
Area (mm²) post-layout	0.58	0.44	0.375	0.24	0.34	0.229
Freq (MHz) post-layout	340	N/A	520	N/A	320	N/A
Power (mW/MHz) post-layout	0.12	0.096	0.103	0.062	0.127	0.1025
Simulated Leakage (mW)	1.145	0.637	2.015	0.689	0.0214	0.0096

90G is with TSMC Sage-X libraries.
65GP is with TSMC Advantage library, Regular Vt.
65LP is with TSMC library (Synopsys), Regular Vt.
Area and frequency at worst operating condition (0.9 * Vdd, 125 C)
Power at typical operating condition (1.0 * Vdd, 25 C)
All area and speed calculations are made assuming 8KB local SRAM size
All area, power, and frequency numbers are representative only, and subject to variation based on each user's chosen process technology, cell library, and design tools.